发明名称 MUTING SIGNAL GENERATING CIRCUIT
摘要 PURPOSE:To allow the muting signal generating circuit to operate with a low- voltage power source by providing a means which mixes currents flowing through two transistors (TR) which turn on according to the level of a detection output signal. CONSTITUTION:When the plus-side voltage of the detection output signal is impressed to an input terminal 9, a TR10 turns on and the collector current is inverted by current inverting circuits 16 and 22 to develop a voltage corresponding to the output current of the inverting circuit 22 at one terminal of a resistance 25. When the minus-side voltage of the detection output signal is impressed, on the other hand, a TR12 turns on and its collector current is inverted by a current inverting circuit 19 to develop a voltage corresponding to the output current of the inverting circuit 19 at one terminal of the resistance 25. When the voltage at one terminal of the resistance 25 exceeds a specific value, an output TR27 turns on and an output signal as a muting signal appears at an output terminal 28. This muting signal generating circuit operates with the low voltage power source.
申请公布号 JPS60186106(A) 申请公布日期 1985.09.21
申请号 JP19840042406 申请日期 1984.03.05
申请人 SANYO DENKI KK;TOKYO SANYO DENKI KK 发明人 HASEGAWA HIRONORI
分类号 H04B1/16;H03F1/00;H03G3/34 主分类号 H04B1/16
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