发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain a CMOS memory characterized by few alpha-ray software errors, by forming an N well by Gap, providing a thin P-type GaP layer between the GaP and a P-type Si substrate, and using a P-type Si substrate characterized by high mass productivity. CONSTITUTION:A P-type Si substrate 11 undergoes dry etching and an etched recess part 12 for an N well is formed. A P-type GaP layer 13 is epitaxially grown. Then the recess part 12 is completely buried by an N-type GaP well part 14. Electrons 52, which are generated by alpha rays in the P-type Si substrate 51, cannot enter an N-type GaP well region to an energy barrier 55 at a heterogeneous interface 54 with the P-type GaP region 53. The film thickness of the P-type GaP 53 blocks the tunnel effect of the electrons. The amount of electron-hole pairs generated in the thin film 53 is minute and does not affect the N well 14. in this constitution of the memory well in a so-called P sub-N- well method, in which the P-type si substrate having the mass productivity is used, software errors are not yielded by the irradiation of alpha rays in the Pch MOSFET in the N well, and reliability is improved.
申请公布号 JPS61256758(A) 申请公布日期 1986.11.14
申请号 JP19850099109 申请日期 1985.05.10
申请人 NEC CORP 发明人 INOUE SHUICHI
分类号 H01L21/8238;H01L21/20;H01L21/761;H01L27/06;H01L27/092 主分类号 H01L21/8238
代理机构 代理人
主权项
地址