发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To reduce element area and to improve high-resistance layer controllability by a method wherein a surface resistance element that is a conductive glass film is built in a transistor region including an ohmic connection and a gate electrode covered with an insulating film. CONSTITUTION:An FET working layer 4 is formed on a semi-insulating substrate 5. On the working layer 4, a gate electrode 1, source electrode 2, and drain electrode 3 are formed, for a Shottky gate type FET, all to be covered with an insulating film 6. Next, after the provision of a photoresist 7, an opening is provided as prescribed for the electrode 2 or 3 by means of the reactive dry etching method. A process follows wherein a tin oxide film 8 is deposited on the photoresist 7 in a chemical reaction. An etchant is applied for the removal of the unnecessary regions from the tin oxide film 8, for the creation of a wiring (metal) 10. An surface resistance element is composed of conductive glass film within the transistor region, which reduces the area of the element and improves the controllability of the high-resistance layer.
申请公布号 JPS61255052(A) 申请公布日期 1986.11.12
申请号 JP19850097103 申请日期 1985.05.08
申请人 NEC CORP 发明人 KAMITAKE KAZUTAKA
分类号 H01L27/04;H01L21/822;H01L27/06;H01L27/095 主分类号 H01L27/04
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