发明名称 Deglitching network for digital logic circuits.
摘要 <p>A deglitching network for digital logic circuits includes a voltage actuated current source coupled to a linear tracking, constant voltage column clamp circuit. The deglitching network threshold level tracks closely with the predetermined voltage of the column clamp, which also acts as a current sink. When heavy current loads are switched from the column clamp and its voltage falls briefly, the deglitching network is actuated to inject current into the column clamp circuit and restore the preset voltage.</p>
申请公布号 EP0201429(A2) 申请公布日期 1986.11.12
申请号 EP19860400982 申请日期 1986.05.07
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION 发明人 LUICH, THOMAS M.
分类号 H03K19/177;H03K5/08;H03K19/003 主分类号 H03K19/177
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