发明名称 Process for making a contact arrangement for a semiconductor device.
摘要 <p>A metal or metal silicide is selectively grown on a nucleating layer (14) having a predetermined pattern on an insulating layer (12), and on a substrate (11) in an opening (13) in the insulating layer (12), to form a metal or metal silicide layer (15) in contact with the substrate (11) in the opening (13) and extending therefrom along the pattern of the nucleating layer (14). This process is advantageous in that a high electroconductive metal or metal silicide layer (15) having a precise pattern can be easily formed.</p>
申请公布号 EP0201250(A2) 申请公布日期 1986.11.12
申请号 EP19860303144 申请日期 1986.04.25
申请人 FUJITSU LIMITED 发明人 GOTO, HIROSHI
分类号 H01L21/033;H01L21/308;H01L21/3205;H01L21/768;(IPC1-7):H01L21/60 主分类号 H01L21/033
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