发明名称 INTEGRATED CIRCUIT
摘要 PURPOSE:To select a CMOS or a TTL by arranging the CMOS and the TTL on an output part and changing the connection of an aluminium wire in accordance with the size of an external load. CONSTITUTION:The output of a CMOS gate 4 in an internal logical circuit area is used for executing aluminium connection changing processing 6 through an aluminium pattern 5 and then connected to the input of a TTL gate 7 and the output of the TTL gate 7 is used for executing aluminium modifying processing 8 through the aluminium pattern 5 and then connected to a bonding pad 9. Since a CMOS gate 10 is not connected to the output of the CMOS gate 4 and the bonding pad 9, no logical signal is received/transmitted. Consequently, the CMOS gate or the TTL gate can be selected in accordance with the size of the external load.
申请公布号 JPS61253928(A) 申请公布日期 1986.11.11
申请号 JP19850095414 申请日期 1985.05.07
申请人 HITACHI LTD 发明人 TAKAHASHI SHIGEKAZU
分类号 H01L27/118;H03K19/0175;H03K19/173 主分类号 H01L27/118
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