发明名称 |
Non-volatile semiconductor memory |
摘要 |
This invention relates to the reduction of programming voltage in a non-volatile memory of the type having a double gate structure composed of a select-gate and a floating-gate. A channel region under the select-gate is highly doped and a channel region under the floating gate is lightly doped or doped to opposite conductivity type. Due to the different doping concentrations between these two channel regions, a large and steep surface potential gap appears at the transition region between the select-gate and the floating-gate in the programming operation thereby reducing the programming voltage.
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申请公布号 |
US4622656(A) |
申请公布日期 |
1986.11.11 |
申请号 |
US19830561728 |
申请日期 |
1983.12.15 |
申请人 |
SEIKO INSTRUMENTS & ELECTRONICS LTD. |
发明人 |
KAMIYA, MASAAKI;KOJIMA, YOSHIKAZU |
分类号 |
H01L21/8247;G11C14/00;H01L29/788;H01L29/792;(IPC1-7):G11C11/40 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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