发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To enable a device to be trimmed, by providing a stress absorbing layer constituted by a second aluminium layer above an interlayer insulation film between base and emitter electrodes which are to be trimming elements. CONSTITUTION:An N<-> type epitaxial layer 5 is formed on a semiconductor substrate 1 through an N<+> type buried layer 4. A trench isolation region 6 is formed through the N<-> type epitaxial layer 5 so as to reach the P-type semiconductor substrate 1. A P-type semiconductor region 2 is provided on the surface of the element region surrounded by the trench isolation region 6. Further, an insulation film 7 and contact holes 7a and 7b are formed. Through the contact holes 7a and 7b, electrodes 8a and 8b constituted by the first aluminium layer are contacted with semiconductor regions 2 and 3, respectively. A second aluminium layer as a stress absorbing layer 10 is formed on an interlayer insulation film 9 so as to cover the electrodes 8a and 8b. According to this construction, trimming elements can be provided without any alteration in the manufacturing processes.
申请公布号 JPS61253853(A) 申请公布日期 1986.11.11
申请号 JP19850095491 申请日期 1985.05.07
申请人 HITACHI LTD 发明人 MIKI SAKAE
分类号 H01L21/8222;H01L21/331;H01L27/06;H01L29/72;H01L29/73;H01L29/732;H03F3/45 主分类号 H01L21/8222
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