发明名称 |
Process and apparatus for testing a microprocessor and dynamic ram |
摘要 |
Process and apparatus for testing a microprocessor and dynamic RAM by a single tester where the microprocessor and dynamic RAM may be on a single card. The process makes the RAM appear static to an external static tester by separate read/write and refresh logic for the RAM. Two different clock generators connect to logic where each clock is selectively connectable to an on-board oscillator or to an external input. Priority logic for gating the refresh logic within a predetermined interval and gating the read/write logic at other times. The process includes three steps of a static logic test, a memory interface test, and, a functional test of the logic and the dynamic RAM. The third step is accomplished by executing a program in the on-card microprocessor. The three steps of the test form a single set of test data. |
申请公布号 |
US4622668(A) |
申请公布日期 |
1986.11.11 |
申请号 |
US19840608655 |
申请日期 |
1984.05.09 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DANCKER, GREGORY A.;GRAZIER, EDWIN C. |
分类号 |
G01R31/3185;G11C29/14;(IPC1-7):G06F11/00 |
主分类号 |
G01R31/3185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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