TENSIONE ASSIEME A TRANSISTORI INTEGRAZIONE MONOLITICA DI CMOS, NPN, PNP E DIODI A BASSA TRANSISTORI VDMOS DI POTERNZA PERDITA. ISOLATI AD ALTA PRESTAZIONE E DI TRANSISTORI MOS A CANALE P PER ALTA

摘要

Isolated from one another N-channel, VDMOS power transistors having a self-aligned and shielded structure and being suitable for high operating voltages and high currents, are monolithically integrated together with drive, P-channel MOS transistors having a drain extension region for tolerating reverse voltages higher than the breakdown voltage of the VDMOS power transistors, and together with CMOS transistors, vertical and lateral NPN transistors, PNP transistors and low leakage diodes for implementing self-contained control systems capable of being driven by logic level signals. The integration is accomplished with a minimum alteration of a known VDMOS transistor's fabrication process.