发明名称 TIME DIVISION MULTIPLE ACCESS DEVICE
摘要 PURPOSE:To obtain a device without misoperation by including a nonvolatile memory element the content of which is electrically updatable, to a channel information memory and providing an adjusting means, at a regulator, which writes the output of a phase deviation information separating circuit on the nonvolatile memory element. CONSTITUTION:A burst signal sending timing pulse 203 controls a main signal memory 24. The main signal memory 24 stores temporarily a signal 204 from a terminal and outputs the burst signal 205 of a slave station, however, a timing when the burst signal 205 is outputted is controlled by the above stated burst signal sending timing pulse 203. The burst signal 205 outputted from a slave station 20 is inputted to a phase deviation detection circuit 32 within an master station 30 through a radio transmission line and is compared with a reference timing pulse 302 which is the output of a reference timing generating circuit 31. A phase deviation information 303 is multiplexed to the prescribed time lot of a main signal 304 by a multiplexing circuit 33 and is outputted to the slave station 20 as a transmission signal 305 of the master station 30.
申请公布号 JPS61251243(A) 申请公布日期 1986.11.08
申请号 JP19850090599 申请日期 1985.04.26
申请人 NEC CORP 发明人 FUJII KATSUNORI
分类号 H04J3/00 主分类号 H04J3/00
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