发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To prevent the fall into a meaningless page input/output repeating operation by reporting contents of an instruction progress state display means to an exception processing routine of software to perform the processing when an exception of an instruction occurs. CONSTITUTION:When the execution of one instruction is terminated in an operation control circuit 1, an instruction execution progress discriminating circuit 2 detects the end of the execution to reset an instruction progress state flag 3. In the case of the next instruction, the circuit 1 outputs the logical address of the operand of this instruction to an address calculation paging control circuit 4 to access a main storage 6 through a main storage interface 5 when this logical address appears. If a page including the designated logical address does not exist on actual addresses of the main storage 6, an operating system (OS) is interrupted by page fault. When accepting the interruption, the OS reads the state of the flag 3 which is supplied simultaneously, and the processing is performed according as the flag 3 is set or not, thus preventing the meaningless page input/output repeating operation.
申请公布号 JPS61251948(A) 申请公布日期 1986.11.08
申请号 JP19850093155 申请日期 1985.04.30
申请人 NEC CORP 发明人 UDA TOSHIYUKI
分类号 G06F12/10 主分类号 G06F12/10
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