| 摘要 |
A semiconductor switching circuit using power MOS transistor as a switching element a drain thereof being connected to a DC power supply through a load and a source thereof being grounded. The power MOS transistor is protected from destruction due to an excessive power dissipation when the load is short-circuited. The switching circuit basically comprises: (a) a first resistor intervened between an input terminal at which the switching signal for turning on the power MOS transistor is inputted and gate of the power MOS transistor; (b) an integrator which operatively integrates the drain potential of the power MOS transistor; (c) a first MOS transistor, a drain thereof being connected to the gate of the power MOS transistor, source thereof being grounded, and gate thereof being connected to an output terminal of the integrator, which turns on to ground the gate of the power MOS transistor so as to turn off the power MOS transistor when the output potential of the integrator exceeds a threshold thereof; (d) a second MOS transistor, a drain thereof being connected to the output terminal of the integrator and a source thereof being grounded; and (e) an inverter connected between the switching signal input terminal and the gate of the second MOS transistor which inverts the potential of the switching signal so that said integrator starts integration when the switching signal is inputted and is reset when no switching signal is inputted, whereby the power MOS transistor is forcefully turned off when the load is short-circuited. |
