发明名称 ARITHMETIC UNIT
摘要 The system employs a fixed point arithmetic unit (ALU) and a separate floating point arithmetic unit (FPU) controlled by a common microinstruction store. Most fields of the 80-bit microinstructions control both the ALU and the FPU, including a source field ALUS an operation field ALUOP. A further 2-bit field EXT determines whether the FPU performs double or single precision arithmetic, in which the operation defined by ALUOP is carried out respectively by all of 16 4-bit slice units and by the top 6 slice units only for 56 and 24 bit results, with 8 guard bits in either case. As well as a destination field ALUD for the ALU there is a separate destination field FPUD for the FPU and each such field is set to disable the output of its respective unit when the output is required from the other unit. Carry-in bits for bits 55 and 23 are entered at bit 63 and propagated through the lower bit slice units to avoid multiplexing in to the higher bit slice units.
申请公布号 AU556521(B2) 申请公布日期 1986.11.06
申请号 AU19820084112 申请日期 1982.05.24
申请人 DATA GENERAL CORP. 发明人 ROBERT WILLIAM BEAUCHAMP;JONATHAN SETH BLAU;JAMES B. STEIN
分类号 G06F9/22;G06F9/302;G06F9/318;G06F9/38;(IPC1-7):G06F7/38 主分类号 G06F9/22
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