发明名称 TIMER DEVICE FOR MULTIMICROPROCESSOR SYSTEM
摘要 <p>PURPOSE:To process a job which is being processed by a down CPU, by using other processor by sharing the timer device with respective CPUs and reading the timer used when one CPU is down, from other CPU. CONSTITUTION:When a CPU 1C uses a timer T0 10 in a timer device 2, a CPU reads the zero-th word of an address number corresponding to the timer T0 10 in a timer control table 3 and investigates the contents. When the occupied flag is not set to the word, the occupied flag is set and the processor number of the CPU 1C is written into a processor number column. If the occupied flag is set, the CPU 1C reads the first word of the address number and inspects the occupied flag. Thus, The timer control table is retrieved and the address number of the timer to be used is stipulated. When the CPU 1C is down while the timer T0 10 is used and a CPU 1D continues and processes the job, the CPU 1D refers to the timer T0 10 and can execute the stopped job.</p>
申请公布号 JPS61249164(A) 申请公布日期 1986.11.06
申请号 JP19850091454 申请日期 1985.04.26
申请人 MITSUBISHI ELECTRIC CORP 发明人 KIYOMOTO YUKARI
分类号 G06F15/16;G06F1/14;G06F9/48;G06F11/20;G06F15/177 主分类号 G06F15/16
代理机构 代理人
主权项
地址