| 摘要 |
<p>PURPOSE:To improve the latch-up capacity of a microcomputer significantly by a method wherein a surge current from a source is limited in a main circuit portion and an integration density is lower in an input buffer portion and an output buffer portion than in the main circuit portion and the current amplification gain of a sidewise P-N-P type bipolar transistor is reduced. CONSTITUTION:In an input buffer portion 12, the distance between protection diodes 121 and 122 is sufficiently large and, in an output buffer portion, the distance between a P-channel MOS transistor 132 and a P-type well, which is a substrate of an N-channel MOS transistor 131, is sufficiently large. Mutual distances between a main circuit portion 11, the input buffer portion 12 and the output buffer portion 13 are also sufficiently large. A positive source terminal VCC 16 is connected to the positive source terminal 119a of the main circuit portion 11 through an inductor 17 and a surge current is limited by the inductor 17.</p> |
