发明名称 |
COMPLEMENTARY TYPE MIS SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PURPOSE:To improve total-dose strength by a method wherein different predeter mined voltages are applied to the first conductive type shield plate electrodes and the second conductive type shield plate electrodes formed on semiconductor element formation regions respectively. CONSTITUTION:N-type shield plate electrodes 5 are formed with MIS composi tion in an element separation region on an N-type semiconductor element forma tion region 2 and the first predetermined voltage V1 is applied to the electrodes 5. P-type shield plate electrodes 4 are formed with MIS composition in an ele ment separation region on a P-type semiconductor element formation region 1 and the second predetermined voltage V2 is applied to the electrodes 4. By applying two different voltages as the first predetermined voltage V1 and the second predetermined voltage V2, formation of inversion layers in the N-type semiconductor region and the P-type semiconductor region can be avoided. Therefore, the thickness of a gate oxide film 3 can be made as thin as several hundred Angstrom or less and hence a total-dose strength against radiation can be improved. |
申请公布号 |
JPS61248459(A) |
申请公布日期 |
1986.11.05 |
申请号 |
JP19850087632 |
申请日期 |
1985.04.25 |
申请人 |
NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
TSUCHIYA TOSHIAKI;NAKAJIMA BAN;MURAMOTO SUSUMU;ARAI EISUKE |
分类号 |
H01L27/08;H01L21/76;H01L21/8234;H01L27/088;H01L27/092 |
主分类号 |
H01L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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