发明名称 SQUELCH CIRCUIT
摘要 PURPOSE:To improve the quality of a reception signal by applying squelch operation to a demodulation circuit reaching a prescribed value of reception level or below after a prescribed delay time, sampling-and holding the demodulation signal within a delay time up to the squelch operation and applying a voltage subjected to sampling and holding after the squelch operation thereby eliminating impulsive noises generated at the output terminal. CONSTITUTION:When an FM demodulation signal is inputted and an analog switch 10 is in open control after a time corresponding to a time constant tau2 elapses and then squelch operation is started, a feeding line to a buffer amplifier 8 is changed over to the position of a sample-and-hold circuit 18 connected via an analog switch 17 and the buffer 8 and a voltage is fed to the buffer amplifier 8 according to the discharge of the voltage of the capacitor of a sample-and-hold circuit 18. Through the switching control above, the power is fed to the buffer amplifier 8 for the discharge time constant of the sample- and-hold circuit 18. Thus, the output of the buffer amplifier 8 is attenuated gradually attended with the power application and a cause of the impulsive noise generation is eliminated.
申请公布号 JPS61248625(A) 申请公布日期 1986.11.05
申请号 JP19850088818 申请日期 1985.04.26
申请人 TOSHIBA CORP 发明人 HATAKEYAMA AKIHIRO
分类号 H04B1/10 主分类号 H04B1/10
代理机构 代理人
主权项
地址