发明名称 MEMORY ACCESS CONTROL SYSTEM
摘要 PURPOSE:To prevent the competition of read-out data of own or other memory devices by installing a communication means receiving and reporting an access request and a means holding information concerned between memory controllers acting in parallel. CONSTITUTION:The memory controllers 1-0 and 1-1 provided in parallel read data out of the memory devices 2-0, 2-1 or those 2-2 and 2-3 according to the access request from respective access originating devices 3-0, 3-1 and 4-0 those 3-2, 3-3 and 4-1. When the access request with respect to the memory device under other memory controllers' control from each access originating device is received, it is transmitted through the communications means 12-0 and 12-1 and held by timing control register stages 10-0 and 10-1, whereby data read out of its own memory device will not collide with the data read out of other memory devices.
申请公布号 JPS61246867(A) 申请公布日期 1986.11.04
申请号 JP19850076215 申请日期 1985.04.10
申请人 FUJITSU LTD 发明人 NAGASAWA SHIGERU
分类号 G06F12/00;G06F9/52;G06F15/16;G06F15/17;G06F17/16 主分类号 G06F12/00
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