| 摘要 |
PURPOSE:To inhibit error data reading by providing an EVEN error flag and an ODD error flag and setting a stored flag to on-state after an incorrectable error is detected. CONSTITUTION:An error flag setting circuit 27 sets 0 to UEE and UEO so long as an error representing ECC incorrection is not detected from a write destination word, and sets 1 to UEE or UEO in a word including an incorrectable error and writes an ECC bit formed by an ECC forming circuit 23 on a memory 1. At data read from a memory 21, an error control circuit 28 checks a flag of UEE and UEO of data in a fetch data register FDR 24 and when one of them is 1, the read of data where the error flag is 0 is inhibited. |
