发明名称 INPUT CIRCUIT OF CMOS SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To prevent a latch-up from happening by a method wherein an N type diffusion layer formed in a P type diffusion layer is provided with a P type diffusion resistor. CONSTITUTION:A P type diffusion resistor 2' is provided in an N type diffusion layer 7 formed in a P type diffusion layer 8 to form a PNP transistor. The N type diffusion layer 7 coming into contact with an outer input terminal 1' turns a PNP transistor normally OFF, thereby exerting no effect over circuitry. Parasitic transistors Q'2 and Q'3 are formed into a thyristors but Q'3 may not be turned ON to prevent a latch-up from generating since another parasitic thyristor Q4 is inversely connected by connecting a collector thereof to the outer input terminal 1' even if Q4 is impressed with a surge voltage from the input terminal 1'.
申请公布号 JPS60192356(A) 申请公布日期 1985.09.30
申请号 JP19840048707 申请日期 1984.03.14
申请人 NIPPON DENKI KK 发明人 TOKUUME TAKAHIRO
分类号 H01L27/08;H01L27/02;H01L27/092;H01L29/78 主分类号 H01L27/08
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