摘要 |
PURPOSE:To estimate the frequency offset simply and in a short time by receiving the test signals of the cycle length symbols in plural cycles and performing the phase comparison between the two prescribed test signals to divide the result of the phase comparison by the number of symbols to be reached between two sampling reception modes. CONSTITUTION:The test signal of a symbol of cycle length l is sent and first stored in a memory circuit 50. Then the test signal delivered with a shift equal to the length l is delivered and stored in a memory circuit 52. A phase comparator 61 compares the phases of the signals stored in both circuits 50 and 52 with a shift of l with each other. Then a multiplier 54 delivers the output obtained by multiplying the output of the phase comparison by the reciprocal number of the length l. The output of the multiplier 54 is equal to the offset and supplied to a delay element 9. Thus it is possible to stabilize a loop filter 4A within the time needed for arrival of the test signals equal to the length l. Then a phase control signal is obtained by means of the output of the filter 4A. As a result, the normal phase control is possible from the start of an operation. |