发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce an isolation region in a logic element, and to miniaturize a chip by mutually collecting and arranging I<2>Ls, which are brought to the same phase and activated mutually, in three-state type I<2>Ls to the same semiconductor island. CONSTITUTION:Five I<2>Ls constituting each memory cell M are divided into three groups G1-G3 of L1 and L2, L3 and L4 and L5, collected and disposed to an epitaxial layer island 11 consisting of the same semiconductor, and insulated and isolated 13. A collector for the I<2>L is represented by C, a base by B and an injector by INJ. The states of the three-state type I<2>L (L1 and L2) of the group G1 are all displayed by word select signals +phi in the positive phase and controlled mutually by the same phase, the states of the three-state type I<2>L (L5) of the G2 are displayed by word select signals -phi in the opposite phase and controlled mutually by the same phase among the memory cells, and reference potential regions are grounded at all times in I<2>L (L3, L4) of the G3. According to the constitution, when the states of several three-state type I<2>L are controlled at every island unit, the isolation regions 13 among I<2>L can be reduced largely, and can also be omitted among the memory cells, thus miniaturizing the size of a chip, then easily manufacturing I<2>L-RAM having large capacitance.
申请公布号 JPS61245567(A) 申请公布日期 1986.10.31
申请号 JP19850086373 申请日期 1985.04.24
申请人 HITACHI LTD 发明人 YAMAZAKI KOICHI;FURUHATA MAKOTO;WATANABE KAZUO
分类号 H01L27/082;G11C11/41;G11C15/04;H01L21/8226;H01L21/8229;H01L27/02;H01L27/10;H01L27/102;H03K19/082 主分类号 H01L27/082
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