发明名称 EXCLUSIVE OR GATE
摘要 PURPOSE:To obtain an exclusive EX-OR gate with no use of the reference voltage by connecting vertically two differential pairs, producing a 1/2VL level difference between both inputs supplied to a transistor of the upper differential pair and supplying the signal having a level shift by a specific amount to the base of a transistor of the lower differential pair. CONSTITUTION:A 1/2VL level difference is produced between the 1st input A and the 2nd input B* and therefore a current flows through the 1st and 3rd transistors TR 1 and TR 3 as long as the two original inputs X and Y have the same level. Thus the output Z is set at a low level. If both inputs X and Y are set at high and low levels respectively, a current flows through the 4th TR 4. Then the output Z is set at a high level. While a current flows through both TR 2 and TR 3 when the inputs X and Y are set at low and high levels respectively. Then the output Z is set at a high level. Therefore the output Z is equal to an EX-OR output in terms of the inputs X and Y.
申请公布号 JPS61245626(A) 申请公布日期 1986.10.31
申请号 JP19850086995 申请日期 1985.04.23
申请人 SONY CORP 发明人 SHOJI NORIO;TAKEDA HITOSHI
分类号 H03K19/21 主分类号 H03K19/21
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