发明名称 GENERATOR FOR DC COMPONENT SUPPRESSION PATTERN
摘要 PURPOSE:To produce a pattern where the DC component of a multi-value QAM wave is suppressed by setting the 2nd signal point at a position symmetrical to the 1st signal point centering on an axis I or Q together with the 3rd signal point set at a position symmetrical to the 2nd signal point centering on the axis Q or I and repeating these setting operations. CONSTITUTION:As shown in the figure, the signal points are produced symmetrically to 0-3 and axes I and Q. Then the signal points are produced in the same way with the base point set at a point 4 more inside from 0 by 1. These operations are repeated to produce the signal points to all signal point trains y=0 and y=7 at the most outer side. Then the signal points are produced in the same procedure for the signal point trains of y=1 and y=6. These operations are repeated for production of all 64 signal points. This procedure is repeated from 0. Thus the DC component is suppressed for the spectrum of a pattern generator which forms such arrangements of signal points. These procedures are stored in a ROM7 and then read out successively with the output given from a counter 6 to be applied to a 64-value QAM modulator via a capacitor. Thus the arrangement of signal points can be shown.
申请公布号 JPS61245659(A) 申请公布日期 1986.10.31
申请号 JP19850087727 申请日期 1985.04.24
申请人 FUJITSU LTD 发明人 MACHIDA KOICHI;FUKUDA EISUKE;TAKEDA YUKIO
分类号 H04L27/36;H04L27/00 主分类号 H04L27/36
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