| 摘要 |
PURPOSE:To patrol simultaneously a control storage during executing a job by reading the instruction of a patrol system, specifying alternately a state and a control storage patrol state and detecting a CS error. CONSTITUTION:A micro instruction CS 12 is accessed through an OR circuit 11 from the instruction buffer 10 of a job program. By a CS read state, CS data is read out and transmitted to an execution instruction processing circuit 13, and then the state of each phase of a pipe line is sequentially executed. The data read out of the CS 12 is branched, entered to an ECC check/correct circuit 14 to check an error. If the error is present, its address is stored in an error CS address register 15, and the CS 12 is accessed through the OR circuit 11. Simultaneously the data concerned from the ECC check/correct circuit 14 is inverted, corrected and written in the CS 12. A CS patrol circuit 16 patrols the CS 12 by the patrol CS read state.
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