| 摘要 |
PURPOSE:To separate signals through a single elastic store memory by supplying the multiplex signal output in common to plural shift registers after serial/ parallel conversion applying the load pulses to the shift registers with time shifts respectively for separation of signals and converting the loaded parallel signals into serial signals. CONSTITUTION:The multiplex signal data is written to an elastic store memory 1 via a control circuit 2. The synchronizing serial output data read out of the memory 1 and underwent multiplexing at the 5-channel conversion part are converted by a shift register 3 into parallel data every 4 bits and latched by a latch 4. Then the signals are separated to shift registers 51-55 corresponding to each channel conversion part by the load pulses of a cock control circuit 6 and the clocks CK1-CK5 supplied in common to those registers 51-55 and synchronous with those load pulse of the circuit 6. The serial data equivalent to 4 bits are delivered to the signaling signal lines SIGR1-SIGR5 after parallel/ serial conversion. This action is repeated 6 times in a frame.
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