| 摘要 |
PURPOSE:To reduce the amount of hardware and the selection time by adding K-number of transistors TRs, K-number of word lines, and M-number of bit lines and selecting addresses with word lines in (K+1)-number of directions are readingn out data from bit lines in (M+1)-number of directions. CONSTITUTION:In the method where data is accessed in the transverse direction and is read out from a memory device 34, the first word line 7 designated by an address WXi (i=1, 2,..., m) is set to a high potential and the first word lines having addresses other than the address WXi are set to a low potential and data in memory cells Ci1, Ci2, ..., Cin are read out from the first bit line 8 and the second bit line 9 which are preliminarily precharged. In case of access in the longitudinal direction, the second word line 32 designated by an address WYj (j=1, 2,..., n) is set to a high potential and the second word lines 32 having addressed other than the address WYj are set to a low potential and data in memory cells C1j, C2j, ..., Cmj are read out from the third bit line 33 which is preliminarily precharged. Thus, the memory device is accessed once when data is read out in any direction, thereby reducing the amount of hardware and the selection time.
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