| 摘要 |
PURPOSE:To control flexibly a buffer memory to simplify a control circuit of the buffer memory by dividing the buffer memory use state into plural levels and giving meanings to these levels and limiting acceptance of write requests. CONSTITUTION:Control signals 101 and 102 are applied to a write pointer register 11 and a read pointer register 12 of a buffer memory controller respectively, and they are applied to a pointer switch 13 also. Outputs of registers 11 and 12 are inputted to write and read pointer registers 14 and 15 respectively. The output of the register 14 is inputted to the switch 13 and a comparator 17 of a buffer memory use state calculating part 16. The output of the register 15 is applied to the switch 13 and a full adder 18 of the calculating part 16, and the output of the adder 18 is applied to the comparator 17. A write address signal 103 is outputted from the switch 13, and a buffer memory use state display signal 104 is outputted from the calculating part 16, thus simplifying the circuit constitution.
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