发明名称 |
High-speed CMOS buffer with controlled slew rate. |
摘要 |
<p>A high-speed CMOS output buffer reduces transient current surges and provides high output DC drive. The buffer includes a first and a second CMOS inverter connected in parallel. Each of the two CMOS inverters includes an N channel and a P channel transistor. The gates of the transistors in the first inverter are controlled by a first control inverter having a first selected switching threshold voltage. The gate of the P channel transistor in the second inverter is controlled by a second control inverter having a switching threshold voltage higher than that of the first control inverter. The gate of the N channel transistor in the second inverter is controlled by a third control inverter having a switching threshold voltage lower than that of the first control inverter.</p> |
申请公布号 |
EP0199374(A2) |
申请公布日期 |
1986.10.29 |
申请号 |
EP19860200167 |
申请日期 |
1986.02.06 |
申请人 |
LSI LOGIC CORPORATION |
发明人 |
WONG, ANTHONY Y.;WALKER, ROBERT M., III |
分类号 |
H03K19/0948;H03K5/02;H03K17/16;H03K17/687;H03K19/003;H03K19/094 |
主分类号 |
H03K19/0948 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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