| 摘要 |
PURPOSE:To short-circuit signal retardation time in a word line and a bit line by forming the word line and the bit line by double layer Al wirings. CONSTITUTION:N<+> layers 22 are brought into contact with N layers 26 for a connection to a capacitor. A first polysilicon layer 30 is formed on a P<-> substrate 20 shaped by N and N<+> layers 26, 22, 24 through an insulator layer 28 consisting of SiO2, etc. The layer 30 is formed to the upper section of the N layer 26 so as to function as an electrode for a capacitor, and a window-shaped opening section is formed to the first polysilicon layer 30 corresponding to a forming region for an MOSFET. Second polysilicon layers 32 are shaped on the substrates 20 among the N<+> layers 22 and the N<+> layers 24, and used as gates for the MOSFET. Since a word line and a bit line are formed by aluminum layers, a dynamic RAM, in which signals are hardly retarded by the word line and the bit line and which can be operated at high speed, is realized. |
