| 摘要 |
PURPOSE:To improve considerably the processing of a branch instruction by confirming the validity of address calculation for prefetch of the branch instruction by comparison with contents of a write register. CONSTITUTION:If the instruction read out from a buffer storage device 1 is '0', this instruction is fetched through an instruction buffer 10 and is set to an instruction register 20 and is decoded and is sent to a buffer storage device 0. Meanwhile, a branch instruction fetch circuit 31 sends the instruction in the buffer 10 to a branch instruction detecting circuit 36 through an instruction prefetch register 21, and the instruction is held in the register 21 and the branch address is calculated in an adder 61 if it is detected that this instruction is the branch instruction. In this case, a branch destination instruction read control circuit 50 monitors whether contents of the register used for calculation of the branch destination address are changed or not, and the change stage of the register 21 is rewritten if they are changed.
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