摘要 |
A digital-to-analog converter interpolator is provided finding application, among others, as a digital ramp smoother. In the preferred embodiment, a regular input step digital ramp signal f(t) is provided as an input signal to a delay line. The delay line is selected so as to have a total delay length equal to an input update period (T) of concern. The output side of the delay line also is adjustable. The delay line voltage output is sampled at intervals of T divided by N over the length of the delay line, where N may be selected to give the desired precision. The sample voltages are summed in a suitable device, and each are given an equal weight of 1/N. The resultant output is a smooth wave form. Structure also is provided for adjusting the gain of the summing device.
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