发明名称 MANUFACTURE OF COMPLEMENTARY TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To shorten a process, and to improve latch-up resistance by simultaneously forming ion implantation layers having peaks at a position in the vicinity of and at a deep position in the surface of a substrate and activating each implantation layer. CONSTITUTION:A resist pattern 25 is shaped onto a block layer 24 through a photoetching method. The ions of a P-type impurity are implanted to an opening section 26. A first boron-ion implantation layer 271 having a peak at a position in the vicinity of the surface of a substrate 21 and a second boron- ion implantation layer 272 having a peak at a deep position in the substrate 21 positioned in the opening section 26 are formed severally at that time. A phosphorus-ion implantation layer 28 having a peak in the vicinity of the surface of the substrate 21 positioned in the opening section 26 is shaped. The implantation layers 271, 272 and 28 are activated through heat treatment in a N2 atmosphere, and P-well layers 29 and an N-well layer 30 are formed mutually adjacently.
申请公布号 JPS61242064(A) 申请公布日期 1986.10.28
申请号 JP19850083969 申请日期 1985.04.19
申请人 TOSHIBA CORP 发明人 TOMIOKA KAZUHIKO;AOKI TAKAO
分类号 H01L27/08;H01L21/76;H01L21/8238;H01L27/092 主分类号 H01L27/08
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