| 摘要 |
<p>PURPOSE:To obtain a fixed decoding signal by controlling automatically the phase uncertainness of a clock of a clock producing circuit after dividing the clock. CONSTITUTION:An exclusive OR circuit 51 obtains an exclusive OR between a received CMI code 2 and a signal 3 which is delayed by a bit through a delay circuit S1. Then said OR is sampled with the fixed timing and inverted for production of a decoding signal. Therefore an exclusive OR circuit 52 obtains an exclusive OR between a division signal 6 produced by a flip-flop circuit F2 of the 1st clock (2f0) 5 and a signal 7 which underwent the waveform shaping at the rise of the code 2 via an inverter 53 and an FF circuit F3. This exlusive OR is always sampled with fixed timing. Thus it is possible to obtain a decoding circuit which is free from such a case where the NRZ signal or a clock has the advance or delay by a bit in terms of time.</p> |
