发明名称 FILTERED INPUTS
摘要 <p>The present invention includes a plurality of input/output processors communicating with a master processor. Each of the input/output processors has a filtering mechanism to filter the inputs before transmission tothe master over the communication channel precluding the necessity of filtering at the master. More importantly, the shared communications system is not loaded down with every change of an input. Because of this feature, only meaningful changes are put on the communication line, thus substantially reducing its load which makes its effective response time stay high. The inputs when received at the master can be immediately handled to improve the central processor response time. Two types of filtering are provided, in particular, transition and debounce filtering to respond to switch and sensor inputs. Also, there is provided a means to programmably select the type of filter and the time period of filtering.</p>
申请公布号 CA1213308(A) 申请公布日期 1986.10.28
申请号 CA19830435726 申请日期 1983.08.31
申请人 XEROX CORPORATION 发明人 FEDERICO, ANTHONY M.;LEGG, ERNEST L.;WILCZEK, STEPHEN P.;PRASAD, HARI K.;PETERY, JAMES J.
分类号 G05B15/02;G05B19/05;(IPC1-7):G05B19/405;G03G15/00 主分类号 G05B15/02
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