发明名称 MANUFACTURE OF JOSEPHSON INTEGRATED CIRCUIT
摘要 PURPOSE:To make it possible to form a highly accurate integrated circuit, by sequentially forming a thin-film-resistor forming metal film, a lower electrode metal film of a Josephson element, and a bonding-part forming metal film, utilizing the difference in etching speed, and simultaneously forming a Josephson element pattern and a resistor pattern. CONSTITUTION:A silicon dioxide insulating layer is provided on the surface of an Si substrate 32 by thermal oxidation. An Al layer 33, an Nb layer 34 and an Al layer 35 are sequentially formed on the substrate 32. RIE is carried out on a Josephson element 30 to a lower electrode 36 and on a thin film resistor element 31 to a terminal electrode 37 by photoetching technology. Thereafter, by using the photoetching technology, the RIE treatment of the Al layer 35 is performed so that only a bonding part remains. The Al layer 33 is etched, and a resistor pattern 38 is formed. The Al layer 35 on the terminal electrode 37 is removed. Then an SiO or SiO2 layer is formed on the entire surface. A window is provided in an SiO2 layer 39 on the terminal electrode 37 of the thin film resistor element. Thereafter, an Nb film is formed by a sputtering method. An integrated circuit is formed by forming a pattern by the photolithography technology. Thus uncertainty in bonding formation can be eliminated, and the yield can be improved.
申请公布号 JPS61241988(A) 申请公布日期 1986.10.28
申请号 JP19850082515 申请日期 1985.04.19
申请人 AGENCY OF IND SCIENCE & TECHNOL 发明人 MOROHASHI SHINICHI
分类号 H01L39/24;H01L27/18;H01L39/22 主分类号 H01L39/24
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