发明名称 MOS TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To prevent the malfunctions by using the pulse signal delivered form an edge sense circuit as an input to hold a level state of an input terminal of an output buffer circuit for a fixed period of time. CONSTITUTION:A level control circuit 20 uses the pulse signal delivered from an edge sense circuit 11 as an input to hold a level state of an input terminal of an output buffer circuit 3 for a fixed period of time when the binary signal 7 delivered from the circuit 3 is changed to an L level from an H level and vice versa. Thus a charging/discharging current flows to the parasitic capacity and therefore the level state has no fluctuation for a period when the charging/ discharging current flows despite the variance of the power supply potential or the earth potential. Furthermore the level state of a signal path is never held by the circuit 20 as long as no pulse signal is supplied. This never disturbs a normal action corresponding to the input signal given from the input terminal.
申请公布号 JPS61242108(A) 申请公布日期 1986.10.28
申请号 JP19850083511 申请日期 1985.04.18
申请人 MITSUBISHI ELECTRIC CORP 发明人 ARITA YUTAKA
分类号 H03K5/00 主分类号 H03K5/00
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