| 摘要 |
<p>PURPOSE:To shorten the time required for storing picture signals in a shift register by half by reading picture signals at the part of rising of clock pulse in the first block, and reading picture signals at the part of falling in the second block. CONSTITUTION:A clock pulse 29 is inputted to the first block 34101 as it is, and inputted after inversion to the second block 34102. In picture signals outputted from a picture signal processing circuit 31, picture signals to be stored in the first and second blocks are arranged alternately in order and 128 signals are connected in total. The period is made to 1/2 of the period of the clock pulse 29. Inputted 128 picture signals are stored in a group of registers 341 consisting of two blocks 34101, 34102 when the clock pulse is inputted just 64 times. Similar operation is performed in other groups of registers 342-3414. Accordingly, the same number of picture signals can be stored within time of half that of conventional one.</p> |
