| 摘要 |
PURPOSE:To shorten the frequency lead-in time and also to shorten the time for securing a phase locked loop, etc., by providing a frequency lead-in means consisting of a sampling circuit, an arithmetic circuit and a frequency-voltage converter. CONSTITUTION:When reproducing a digital signal, first of all, a frequency rise characteristic is obtained through a frequency-voltage converter F-V 8 from the output frequency (fo) of a crystal oscillator 5. Subsequently, the output of the F-V 8 is brought to sampling by using a digital signal fi as a sampling frequency through a sampling circuit 9. Next, it is differentiated by an operating circuit 10 and the inclination of the frequency rise characteristic obtained from the oscillator 5 is obtained and it is quantized and outputted as a control signal to a digital phase locked loop circuit DPLL 4. In the DPLL 4, in accordance with the output of the circuit 10, the larger its value is, the larger the phase step width is set and a frequency lead-in is executed so that an output signal fd coincides with the transmission rate of the signal fi. In this way, the lead-in time can be shortened and also the time for securing a phase locked loop, etc. can be shortened. |
