| 摘要 |
PURPOSE:To make it possible to analyze trouble by comparing output value obtained by inputting a test pattern to an IC to be tested and the expected value of an output, and referring to fault simulation data when the output is discordant. CONSTITUTION:In an IC testing device 100, the output value sent out from the IC 6 to be tested through a test head 5 is compared with the expected value of the output sent out from a simulating device by a judging device 2. When the output value and expected value of the output are judged as discordant by the device 2, the output value of the IC 6 is fed back to a trouble analyzing device 10, and the place of the trouble is judged by referring to the fault simulation data, and the trouble is displayed. Then, an IC logical circuit of the place of the trouble is rewritten to conform with the output value from the IC 6, and logical simulation and the fault simulation are repeated. Thereby, test is executed to the last, and accordingly, it becomes possible to analyze troubles of plural places in a short period in IC test at the time of development.
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