发明名称 BUFFER MEMORY DEVICE
摘要 PURPOSE:To obtain a compact buffer memory device which can be controlled independently to each peripheral device by providing a buffer memory circuit in common with plural peripheral devices and extracting the output out of the buffer memory with an action flag given from each peripheral device. CONSTITUTION:The various output data 2 given from a data output device 1 are supplied to a buffer memory circuit 6 together with action flags 9a-9n showing the working states of peripheral devices 4a-4n given from these devices themselves. The circuit 6 stores those data and flags. A data discriminating/sorting circuit 10 reads the output data addressed to the corresponding peripheral device out of the circuit 6 when the data output is required to the peripheral device by the control signals 8a-8n given from devices 4a-4n respectively. Then the circuit 10 compares the action flag added to said output data with the action flag supplied to the circuit 10 from the corresponding peripheral device. When the coincidence is obtained from this comparison, the output data 7 of the circuit 6 is validated. Then the decided sorting data 11a-11n are delivered to the corresponding devices 4a-4n respectively. While the data 7 is invalidated and disused if no coincidence is obtained between said both action flags.
申请公布号 JPS61240324(A) 申请公布日期 1986.10.25
申请号 JP19850082918 申请日期 1985.04.17
申请人 MITSUBISHI ELECTRIC CORP 发明人 YOSHIDA MANABU;FURUYA MUNEHISA
分类号 G06F13/38;G06F5/06;G06F13/12 主分类号 G06F13/38
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