| 摘要 |
PURPOSE:To attain high-speed operation and low power consumption at the time of battery backup by controlling operation/hang-up of a back bias voltage generating circuit on the circuit board corresponding to the state when a TTL signal is supplied/not supplied. CONSTITUTION:When the TTL signal is supplied and an inversed chip-selection signal CS becomes lower than a logical threshold voltage, the output of the CMOS inverter circuit IV3 of the back bias voltage generating circuit on the board becomes H. Then a NAND gate G opens and operates as an inverter circuit substantially so that an oscillation operation is conducted. And a back bias voltage for board Vbb is generated through inverters IV4 and IV5, a capacitor C and a diode type FETQ51 etc. to decrease the influence of the parasitic capacitance of the board and accordingly the dynamic type RAM operates with high speed. On the contrary, when the power supply of the TTL circuit is interrupted hence the TTL signal is not supplied, the operation is stopped similarly and the back bias voltage generating circuit does not consume current. As a result, the consumption at the time of battery backup is decreased and the battery life is extended.
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