| 摘要 |
PURPOSE:To assure sufficiently reliability even if being made fine, by arraying a first address line second address line so that they are not overlapped with each other, and by forming close an N-type region and P-type region is the direction of the channel width on the semiconductor surface between both the address lines. CONSTITUTION:A conductor layer 6 being a first address line and a conductor layer 7 being a second address line are arrayed not so as to be overlapped with each other. A first FET 51 may be an N-channel MOSFET, a second FET 52 a P-channel MOSFET, and a third FET 53 an N-channel junction type FET. For example, a first reference potential may be 3V, a second reference potential may be 0v, a threshold voltage of the first FET may be 1.0V a threshold voltage of the second FET may be 1.0V at 0V of the substrate voltage and may be 0.5V at 3V of the substrate voltage, and a threshold voltage of the third FET may be -2.0V. At this time, binary information can be stored by charging or discharging a capacitor 54, etc., being connected with P-type regions 52b, 53g1 which are under an electrically floating state. |
