摘要 |
PURPOSE:To set optionally a transfer path by providing a data storage area in each PE of plural PEs arranged in a linear array. CONSTITUTION:Input signals u1, u2-un from a PEk1 are stored in an input buffer 11 and an input signal rk is stored in an input register 13. The data in the input buffer 11 and the input register 13 are given to an arithmetic section 14 and the operation among the rk and the u1, u2-un is executed. A memory 15 is a data storage area D<k>xy(x=1,2...I, y=1,2...J) comprising a matrix of I row X J column, each data of each data storage area D<k>xy of the PEk is shifted to each data storage area D<k>x,y+1 at data transfer between adjacent PEk and PEk-1, a data stored in each data storage area Dk-1x-1,1 of the adjacent PEk-1 is transferred to each data storage area D<k>x1(xnot equal to 1,xnot equal to I) of the PEk, the result of arithmetic operation is stored in a data storage area D<k>11 of the PEk at the end of arithmetic operation the operations above are applied to all the PEs. |