| 摘要 |
PURPOSE:To make it possible to perform the analysis of operation, by providing a light transmitting slit so that a part of a p-n junction is exposed in a light shielding wiring layer, and projecting light on the p-n junction region. CONSTITUTION:Diffused layers 1 and 4 correspond to n-type diffused layers n2 and n1. A gate region 2 and polysilicon 3 correspond to gate polysilicon gn. A first wiring layer 5 and a contact part 6 of the wiring layer 5 and the diffused layer 3 correspond to a part of an output OUT. Then, light can be projected on a part of the p-n junction at the lower layer through a slit 8, which is provided in a second wiring layer 7. Thus the logic state of a CMOS inverter circuit can be measured. In this way, the analysis of defective operation can be performed by light without increasing the area of a chip. |
