| 摘要 |
PURPOSE:To improve debugging efficiency by using an up-down counter so as to manage an event group detected by a circuit supervising a bus signal thereby detecting the combinations of events in a time series in real time. CONSTITUTION:A debug device extracts a bus signal (data signal, address signal, control signal) on the system bus of an information processor 1 to apply degub. Comparator circuits 21, 24 are circuits detecting specific events by a bus signal on a system bus and the output of the up-down counter 3 and set the condition of the event to be detected to defined registers 71-74. The condition to be set in the registers 71-74 is optional combination with the address range, data range, the pattern of the control signal and the output of the up-down counter 3. |
