| 摘要 |
PURPOSE:To attain quick simulation having little overhead by carrying out optimum distribution of nodes for each processor in a parallel logic simulator. CONSTITUTION:In case of SML model where arithmetic units (nodes) of a logic simulation SML are rated levelwise across a register and next stage's register as well as a parallel logic simulation machine which is practicable for a simulation, means stating in a caption 11 will measure levelwise a distribution state of nodes for a model which is handled by the parallel logic simulation and means 12 will decide node-kindwise a using quantity of parallel processors of the parallel logic simulation machine. In addition, means 13 will determine node-kindwise each number of using processors of the parallel logic simulation machine and means 14 will distribute nodes to the designated plural parallel processors. When its means fail to distribute the nodes, means 15 makes the means 12 start again to execute respective distributions of node-units by means ranging from 12 to 14. Thus such prepared node distribution data are inputted into the parallel logic simulation machine 16.
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