| 摘要 |
PURPOSE:To improve the efficiency of data transfer by providing two buffer memories and bringing the 2nd buffer memory under the control of a sub processor when the 1st buffer memory is under the control of main processor. CONSTITUTION:After the main processor 1 writes the 1st data block to the 1st buffer memory 3a, memory changeover is applied, the buffer memory 3a is connected to the sub processor 2, a start signal and a command are sent from the main processor 1 to the sub processor 2 to start the operation of the sub processor 2, then the 1st buffer memory 3a starts transfer, the 2nd buffer memory 3a starts transmission and the 2nd buffer memory 3b is connected to the main processor 1 to wait for the reception of next data block and the next data block is written in the 2nd buffer memory 3b in succession to the first data block. |
