| 摘要 |
PURPOSE:To level the surface of a first polycrystalline silicon layer and to improve the reliability of a wiring structure formed in an upper layer, by providing a process of forming the first polycrystalline silicon layer which can be buried in a recess and doping an impurity into this layer, a process of forming a second polycrystalline silicon layer thereon, and a process of etching back these layers under a specific condition. CONSTITUTION:Recesses 2 are formed in the surface of a P-type silicon substrate 1, a silicon oxide film 3 is formed on the surface of the silicon substrate 1 including the inside of each recess, and a first polycrystalline silicon layer 4 is formed by deposition. Thereafter phosphorus is diffused (doped) into the first polycrystalline silicon layer 4, and a second polycrystalline silicon layer 5 is deposited on the first polycrystalline silicon layer 4. Then, the etch back of the first and second polycrystalline silicon layers 4 and 5 is started. By adopting an etching condition that the etching speed of the polycrystalline silicon doped with an impurity is larger than the intrinsic etching speed of polycrystalline silicon, the etching of the flat portion of the first polycrystalline silicon layer 4 proceeds more thereafter than the etching of the first polycrystalline silicon layer 5 on the recess 6. |
